Flash memories are currently by far the most widely used type of non-volatile memory (NVM), and phase-change memories (PCMs) are the most promising emerging NVM technology. For a general discussion of NVM, see materials by WEB-FEET RESEARCH, INC. (available at the Internet address of www.web-feetresearch.com). For a discussion of PCM technology, see G. W. BURR et al., Journal of Vacuum Science and Technology, vol. 28, no. 2, at pp. 223-262 (2010). Flash memories and PCM have many important common properties, including noisy cell programming, limited cell endurance, asymmetric cost in changing a cell state in different directions, the drifting of cell levels after programming, cell heterogeneities, and the like. See the Burr article referenced above. As representative NVMs, they have been, and likely will continue to be, widely used in mobile, embedded, and mass-storage systems. They are partially replacing hard drives and main memories, and are fundamentally changing some computer architectures.
Both PCMs and flash memories use multi-level cells (MLCs) to store data, and increasing their storage capacity is extremely important for their development and commercial application. Current NAND flash memories are typically constructed with 4-level cells in commercially available products, and can achieve 8-level to 16-level cell construction in prototype devices. For PCMs, 4-level cells have been sampled. Each level in an MLC represents a different number that can be stored in one or more iterations of data writing, which is referred to as programming. The pattern of 0's and 1's stored in each cell for a particular level corresponds to a binary representation of data. For flash memories, when the top-most cell level has been programmed for cells in the same block, then all the cells in the block must be erased and the data programming operation is started over for programming a new data value. For example, a 4-level flash memory cell can be programmed four times (meaning that four different data values can be stored, from Level 0 to Level 1, Level 2, and Level 3) before the cell must be erased for starting the programming over at Level 0.
The MLC technology for phase-change memories (PCM) and flash memories faces very serious challenges when more levels are added to cells. As noted, these additional cell levels are needed for higher storage capacity. The challenges to programming cell levels accurately with an increasing number of cell levels are mainly due to: (1) Programming noise. The process of programming cells to change their states is a noisy process (see, e.g., the Burr article referenced previously, and P. CAPPELLETTI, C. GOLLA, P. OLIVO AND E. ZANONI (Ed.), Flash Memories, Kluwer Academic Publishers, 1st Edition (1999)); (2) Cell heterogeneity. Cells display significant heterogeneous properties due to their heterogeneity in cell material and geometry, especially when the cell sizes scale down (see the Cappelletti article referenced previously, and see A. JAGMOHAN et al., Proc. International Conference on Communications (ICC), Cape Town, South Africa (2010)). Even if the same voltage is used to program cells, their cell levels may change differently. See, e.g., H. T. LUE et al., Proc. IEEE Int. Symp. on Reliability Physics, vol. 30, no. 11, pp. 693-694 (2008). This poses a significant challenge for parallel programming, because common voltages are used to program cells in parallel for high write speed; but the heterogeneity of cells make them programmed differently; (3) Necessity/preference to program cells without overshooting. For flash memories, removing charge from any cell will lead to block erasures, which can be very costly in terms of device resources; so when cells are programmed, a very conservative approach is typically used to gradually increase the cell levels without overshooting. See, e.g., the Cappelletti article referenced above. For PCMs, increasing a cell's resistance requires melting the cell to return it to the amorphous state; so to crystallize a cell for a higher level, it is strongly preferred to cautiously increase the level without overshooting. See, e.g., the Burr article referenced above. Since MLC uses fixed cell levels to represent data, the gaps between cell levels must be sufficiently large to tolerate the worst-case performance of programming. Similar difficulties are confronted by PCMs and flash memories in attempting to increase the levels available for programming.
New techniques for information storage in memory devices would be beneficial by increasing the number of data values that can be programmed for the cells in the memory device.